42 lines
636 B
Makefile
42 lines
636 B
Makefile
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# Sagi Dayan - Makefile
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#
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# compiler
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CC=gcc
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# compile arguments
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CFLAGS+=-c -g -Wall
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# linker flags
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LDFLAGS+=
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# libraries
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LIBS+=
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# our source files
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SOURCES=main.c
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# a macro to define the objects from sources
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OBJECTS=$(SOURCES:.c=.o)
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# executable name
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EXECUTABLE=myTerminal
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$(EXECUTABLE): $(OBJECTS)
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@echo "Building target" $@ "..."
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$(CC) $(LDFLAGS) $(OBJECTS) -o $@ $(LIBS)
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@echo "Done!"
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# a rule for generating object files given their c files
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.c.o:
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@echo "Compiling" $< "..."
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$(CC) $(CFLAGS) $< -o $@
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@echo "Done!"
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clean:
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@echo "Ceaning up *.o Files..."
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rm -rf *s *o $(EXECUTABLE)
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@echo "Done!"
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.PHONY: all clean
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